The subject matter disclosed herein relates to power converters for electric motors. More specifically, the subject matter relates to a current regulator which compensates the rotor position signal for delays introduced due to pulse width modulation and digital sampling in a motor drive.
As is known to those skilled in the art, electric motors require power converters, commonly called motor drives, to regulate the amplitude and frequency of the electrical voltage applied to the motor in order to achieve variable speed control of the motor. Motor drives commonly utilize Pulse Width Modulation (PWM) algorithms to vary the amplitude and frequency of the electrical voltage. These PWM algorithms operate to continuously switch a voltage, commonly a DC voltage, on and off. If analyzed over a short period of time, the switched output voltage results in an average voltage value applied to the motor. The motor drive uses a current regulator to generate a desired voltage reference during a first carrier period. The carrier period is the time interval (the inverse of which is known as the carrier frequency) during which the PWM voltage switches on and off to provide the desired average voltage value for that time interval. The desired voltage reference is updated and remains the same during each carrier period, resulting in a stair-step waveform of voltage references output by the motor drive. If the carrier frequency is large enough with respect to the desired electrical output frequency to the motor, each step of the output waveform will be small and the output voltage begins to approximate a sinusoidal waveform. Under these operating conditions, the motor drive typically provides an output voltage suitable for controlling the motor.
However, PWM switching is not without drawbacks. As the carrier frequency and the desired electrical output frequency to the motor grow closer, each step of the output voltage waveform grows longer diverging from the desired sinusoidal output voltage reference and increasingly appearing to be a stepped voltage output to the motor. The stepped output voltage may produce undesirable operation, including instability of the current regulator resulting in a loss of control of the motor.
In addition to the potential instability in the current regulator, the digital nature of the motor drive may present further challenges for providing high performance motor control. The motor drive samples continuous time signals, such as the current in the motor and rotor position, at discrete time intervals. The current regulator uses these discrete values to calculate a voltage reference. Sampling and execution of the current regulator are performed during a first carrier period of the PWM algorithm. The voltage reference is then output to the motor during the following carrier period. Consequently, the output voltage, in addition to being a stepped waveform, is inherently delayed from the sampled signals by one carrier period. The resulting voltage waveform output to the motor, therefore, includes a phase lag that is dependent on several factors, including the carrier frequency, the output frequency, and the sampling of the continuous time signals.
Previous attempts to compensate the current regulator have focused on the dependency of the phase lag on the carrier frequency. Typically, a time delay equal to one half of the carrier period has been introduced into the voltage reference calculation. Such a delay results in the current regulator providing a voltage reference for the middle of the next carrier period as this is the period during which the reference is being applied to the motor. While such compensation yields some improved performance, it fails to consider the dependency of the phase lag on the desired output frequency and on the timing of sampling the continuous time signals. As the ratio of the carrier frequency of the PWM algorithm to the desired output frequency becomes smaller, the ability to accurately determine the phase lag between the output voltage reference and commanded voltage reference becomes more important. Therefore, it would be desirable to have a motor drive that provides an improved angle compensation for the current regulator in order to improve stability of the current regulator as the ratio of the carrier frequency of the PWM algorithm to the desired output frequency to the motor decreases.